[{"data": {"name": "Deterministic clock gating to eliminate wasteful activity due to wrong-path instructions in out-of-order superscalar processors", "@type": "ScholarlyArticle", "genre": "proceedings-article", "author": [{"name": "Nasir Mohyuddin", "@type": "Person"}, {"name": "Kimish Patel", "@type": "Person"}, {"name": "Massoud Pedram", "@type": "Person"}], "@context": "http://schema.org/", "encoding": [{"@type": "MediaObject", "contentUrl": "http://iccd.et.tudelft.nl/2009/proceedings/166Mohyuddin.pdf", "encodingFormat": "application/pdf"}], "publisher": {"name": "IEEE", "@type": "Organization"}, "identifier": [{"@type": "PropertyValue", "value": "10.1109/iccd.2009.5413158", "propertyID": "DOI"}, {"@type": "PropertyValue", "value": "CCe6FDe3nFdjD-CTvNTR8VaePVV-CDLWGuX79W87W-CRLFTizh8Putu", "propertyID": "ISCC"}], "datePublished": "2009-10-01"}, "schema": "schema.org", "mediatype": "application/ld+json"}]